Semiconductor devices and methods of making same



Juli-0, 1935 J. MoYsoN 3,196,330

SEMICONDUCTOR DEVICES AND METHODS OF MAKING SAME JOSEPH MOYSON BMM H sATTORNEY.

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United States Patent O 3,196,339 SEMICNDUCTR DEVCES AND METHODS F MAKEN@SAME Joseph Moyson, Union Springs, NX., assigner to General ElectricCompany, a corporation of New York Filed .lune l0, i969, Ser. No. 35,336il Claims. (Cl. 317-235) The present invention relates, in general, tosemicon ductor devices and, in particular, to improvements insemiconductor devices of the multi-layer type having switch-likecharacteristics.

Such devices are described in an article by Moll, Tanenbaum, Goldey andHolonyak in Proceedings of the IRE, September 1956, volume 44, pages1174-1182. One form of such currently available devices includes a pairof main current carrying electrodes and a control electrode. Whenconnected in circuit, significant current conduction across the mainelectrodes is blocked until a small control current of suitablemagnitude is applied to the control electrode. Such form of device iscomposed of a body of silicon semiconductor material having fourdistinct layers with adjacent layers being of opposite conductivity typeto form a plurality of P-N junctions and having an electrical terminalconnected to each of the outside layers. When one terminal is biased inone polarity with respect to the other terminal, the two P-N junctionsnearest the termins become reversely biased and the center P-N junctionbecomes forwardly biased; thus a high impedance is presented between theterminals. if a sufficiently large potential is applied between theterminals, the two P-N junctions nearest the terminals break down andconduct current in the reverse direction. When the one terminal isbiased in the other polarity with respect to the other terminal, the twoP-N junctions nearest the terminals become forwardly biased and thecenter P-N junction becomes reversely biased; thus a high impedance isagain presented between the terminals. However, if the potential appliedbetween the terminals is increased, or if control current of suitablemagnitude and direction is applied to one of the intermediate layers,eventually not only does the center P-N junction break down, butreverses in polarization and a very low impedance is presented betweenthe terminals.

Two requirements which must be ullled in order to obtain the reversal inpolarity of the center P-N junction and hence conduction thereacross are(l) that one of the two transistor sections into which the device isresolvable, an NPN and a PNP transistor section with the center junctionbeing the collector junction of each of the transistor sections, have acurrent gain, a, which increases with current, and (2) that the sum ofthe current gains of the two transistor sections be equal to or greaterthan unity at some intermediate current. The variable current gainrequirement is inherent in silicon P-N junction structures. Sufficientcurrent is passed by the center junction as a result of leakage oravalanche eiects to enable the second requirement to be met.

Desirable qualities in such devices are that they be relativelyinsensitive to ambient temperatures and heating in the device itself,particularly with respect to being able to withstand high temperatureswithout spontaneously triggering in the absence or" a control currentapplied to the control electrode. Another desirable quality in suchdevices is that they have the capability of switching large currents inresponse to very small control current. in devices such as describedabove, these two requirements are normally contradictory. Normally, asthe capability for switching larger currents is enhanced, larger controlcurrents are required for this purpose. It would be particularlydesirable to obtain control current sensitivity 3,l95,33 Patented July20, i965 r'ce along with higher temperature stability. A series ofdevices are disclosed in a copending patent application, Serial Number838,504, Richard W. Aldrich and Nick Hononyalr, Ir., iled September 8,1959, and assigned to the assignee of the present invention, in whichbetter temperature stability is obtained. However, in some of thedevices disclosed in that patent application, some control currentsensitivity has to be sacrificed over the sensitivity of conventionaldevices.

The present invention is directed to the provision of switching devicesof the kind described in which better control current sensitivity andbetter temperature stability are concurrently obtained as Well as to theprovision of novel devices.

Accordingly, it is an object of the present invention to providesemiconductor devices of improved characteristics.

It is another object of the present invention to provide novel means forcontrolling the conduction of multilayer switching devices.

It is still another object of the present invention to providemulti-layer switching devices of greater sensitivity.

It is a further object of the present invention to provide novelsemiconductor devices of switch-type characteristics which are stableand relatively insensitive to temperature effects.

1t is a further object of the present invention to provide novelmulti-layer three-electrode switching devices of greater designflexibility and more versatility in circuit application.

In carrying out the present invention in one illustrative form thereof,a body of semiconductor material including four layers of one and theopposite conductivity type are provided. The layers of one conductivitytype are interleaved with layers of the opposite conductivity type toform `three P-N junctions therein. One electrode is provided making lowresistance oh-mic contact with a surface of an external layer of saidtbody and exposed surface of an adjacent intermediate layer. Anotherelectrode is provided making low resistance ohmic cont-act with asurface of the other external layer of said body. A third electrode isprovided making minority carrier injecting contact with theaforementioned adjacent intermediate layer Iand cooperatively associatedwith innermost junction to provide transistor action therewith. Thethird electrode is cooperatively associated with the o-ne electrode,thereby enabling the center P-N junction adjacent the third electrode tobe rendered conductive with minimal applied control current; thusinitiating a sequence of action by which the center P-N junction becomesconductive over its entire extent. The one electrode need not beconnected to the intermediate layer in order for the above acti-on to beobtained. Suiiicient control current flow can be obtained between thethird electrode and the one electrode by virtue of such effects assaturation current or Zener breakdown.

Further objects and advantages of the present invention will be moreclearly understood by reference to the following description taken inconnection with the accompanying drawings and its scope will 4beapparent in the appended claims.

In the drawings:

FIGURE 1 shows a sectional view of a four-layer `three-electrodeswitching device in accordance with the present invention;

FIGURE 2 is a graph of the current versus voltage characteristics of thedevice of FlGURE l;

FIGURE 3 is an idealized graph of the current versus voltagecharacteristics oi the device of FIGURE 1 show-` ing the characteristicsfor various values of control current;

FIGURE 4 shows a sectional view of another embodiment of a four-layerthree-electrode switching device in accordance with the presentinvention;

FIGURE shows an idealized graph of the current .versus voltagecharacteristic `of the device of'FIGURE` 4;

FIGURE 6 shows a sectional view of still another embodiment of lafour-layer three-electrode switching device in accordance with thepresent invention;

FIGURE 7 shows an idealized graph of theV current versus volt-agecharacteristic of the device of FIGURE 6;

FIGURE 8 shows a perspective View ofone structural form which the deviceof FIGURE 1 may take;

`FIGURE 9 is a sectional view along section 9 9 of "the device of FIGURE8; f

' versus voltage characteristic of the device of FIGURE 12.

Referring now in particular to FIGURE 1, there is( `shown across-sectional view of an illustrative embodi- Vment of the presentinvention. FIGURE 1 sh-ows a semilconductor device 1 comprising a bodyof semiconductor material 2 having four layers or regions ther-ein, -anN- type conductivity intermediate region 3, a P-type conduc- Y tivityex-ternal region 4, a P-type conductivity intermediate region 5 adjacentthereto, and lan N-type conductivity external -region y6 adjacent theP-type intermediate region 5. These regions meet to form three generallyparallel P-N junctions, IC, J'El, and JEZ. JC is referred to as thecollector or center junction and is formed between 'the Nftype region 3and the P-type region S. IEl is re- 'ferred to as the first emitterjunction and is formed between they P-type layer l5 and N-type layer 6.JE2 is referred to as the second emitter junction and is formed betweenN-type layer 3 and P-type layer 4. The intermediate P-type region 5surrounds the N-ty-pe region 6 on two sides and has `a surface 7coplanar with the outside surface 8 of region 6. Junction .IEl has asubetan tial portion generally parallel to a surface 8 and a p0rtion oflesser extent 10 generally perpendicular to and meeting with externalsurfaces 7 and 8 of regions 5 and 6, respectively. The body 2 has a pairof opposed surfaces generally par-allel to the collector junction IC.One opposed surface 18 comprises the external surface of the P-typeregion 4 and the other comprises the external surface 8 ofthe N-typeregion 6 and external surface 7 of intermediate P-type region 5 coplanartherewith. A conductive electrode 12 is secured in good conductivecontact with the externa-l surfaces 7 and 8 and another conductiveelectrode 13 is secured in good conductive contact to the externalsurfaces 18. Electrode 12 spans an-d short circuits junction JEl along aline whose projection perpendicular to the plane of the drawing is point11. Electrodes 12 and 13 are connected to external terminals 14 and 15by leads 16 and 17, respectively. A minority carrier injecting region6a, a region of N-type conductivity, for example, is provided in thelayer 5 which extends out` -to the top surface of the device on thatside of the junction IEl which is remote from the part of JEl which isshort circuited and forms JE4 therewith. Electrode 19 is connecte-d toregion 6a. Y

Region 6a is -of smaller extent than region 6 and forms with P-typeregions 4 and 5 .and N-type region 3 another four-layer three-electrodeswitching device with electrodes 12 and 13 being the external electrodestherefor. The region 6a may be differently formed than region 6, i.e. itmay be more heavily N-type conductivity and it may be more closelyspaced to ICthan J E1 and thus .could be made t appreciably moreetlicient as an emitter than region 6 and require only small triggeringcurrents to render the device conductive between electrodes 12 and 13.

The operation of the device of FIGURE 1 will be explained by referenceto lFIGURE 2 which shows a graph of the voltage versus currentcharacteristics of the device yof FIGURE 1. In the graph the current owbetween the electrodes 12 and 13'is represented as the ordinate and thevoltage applied across the electrodes is represented a-s the abscissa.Assume tha-t an increasing voltage .is applied between electrodes 12 and13 by means of generator 39 and `series current limiting resistor 31connected through switch 30a between terminals 14 and 15, so as torender electrode 12 increasingly positive with respect t-o electrode 13.I unction IEl tends to become and JBZ becomes reverse-ly biased and thusblocks current flow thereacross. The collector junction JC is forwardlybiased. Thus, a lhigh impedance is presented across electrodes 12 and 13until avalanche breakdown voltage of the emitter junction IE2 is reachedcorresponding to voltage represented by fabscissa 20 on the graph 2.Assume that an increasing voltage is applied between electrodes 12 and13 to'render electrode 12 increasingly negative with respect to ele..-trode 13. With such voltage applied, junctions JEl and IE2 becomeforward biased and junction IC becomes reversely biased. At low currentsemitter junction JEl is practically inoperative as an emitter because ofthe :shorting of the regions 5 and 6 by Velectrode 12. As the l1vol-tageacross the device increases, only a small saturation current `ilowsrepresenting reverse current across junction IC shown as ordinate 21 onthe graph of FIGURE 2. As the voltage approaches the avalanche voltageVBO of collector junction IC, the current flow across junction JCrepresented by arrow 22 is parallel Vto the emitter Yjunction JE1 towardthe surface 7 and increases rapidly.

The resulting voltage drop produced by this cur-rent flow in region 5along junction IE1 forward biases IEl with the largest bias occurring atthe right-hand edge of the junction farthest from the shorting contact11. The effective emitter eiiciency and hence alpha increases rapidlywith increased current flow. When the current reaches a level Isreferred to as turn-on current at which the alpha sum of the NPN and thePNP transistor sections of the device is greater than unity, the deviceswitches to the l-ow voltage state and t-o a voltage corresponding toabscissa 23 `on the graph 4of FIGURE 2. The transistion is very abruptfor the reason that as the voltage across collector junctionJC drops,the current'originally distributed over the entire region S n-ow shiftsmainly to the edge of region 6 remote from portion 10 and the currentdensity becomes very high. The device switches to the low voltage stateat a stillhigher current level at which the alpha sum requirement ismet. Once the switch is on, sufficient biasing of the base regi-on 5must still be maintained to hold the emitter in strong forward bias.Since JC is now in forward bias, -avalanche effects `of IC no longer aresignificant in maintaining conduction of the device. When externalcircuit requirements are such that the current Ih in lFIG- URE 2 lisless than the minimum value necessary to maintain the device inconduction as represented by ordinate 24, the device ceases to conductand reverts to its nonconductive state. In the region of heavy forwardconduction,'most of the emitter is biased int-o conduction and thedevice exhibits the low impedance characteristic of conventional PNPNswitch devices. With Irespect to the characteristics shown in FIGURE 2,it has been found possible to va-ry the value of the switch-on currentIS to be greater than, equal to, or less than the hold current Ih, asexplained in the aforementioned patent application.

The manner of operation of junction gate or control region 6a will beexplained with respect to the family of graphs in FIGURE 3. The familyof graphs labelled IGI, IGZ, IG3, and IG4 show the current lversusvoltage characteristics for increasing values of control current IGapplied to electrode 19. The increased injection from region 6a intoregion S is obtained by appropriately negatively biasing electrode 19with respect to electrode 12 by means of generator 32 and series currentlimiting resistance 33 connected through switch 32a between electrode i9and 12 to permit layer en to function as an emitter. Increased 'biasacross electrode 19 with respect to electrode l2 independently increasesthe injection into region S, thereby raising lthe alpha of the NPN partsof the four-layer switch .section or" which it is a part, therebypermitting the alphaincreasing-with-current and the alpha-sumrequirements referred to above to be met by this section of the device,thus causing the center junction to break down and reverse its polarityas explained above. This conditi-on existing for the indicated smallsection of the dev-ice permits suiiicient current to flow across IC tocause the main section of the four-layer device to break it down andconduct, thereby a low impedance is presented between the electrodes 12and 13. It should be noted that the initiation of conduction over thecontrol section of the device is independent of the temperaturestabilizing effect of the shorted emitter structure. It has beenmentioned above that the region 6a. may be made very sm-all and hencerequire only small injection currents to initiate the breakdown of thejunction JC. Also, the eiiiciency of region da as an emitter may beaugmented and located very close to JC without eiecting the reversevoltage breakdown characteristic of the device, but increasing the alphaof the NPN section, thereby increasing its sensitivity as Well as theoverall control sensitivity of the device.

The device shown in FGURE l may be constructed by any of a variety oftechniques. In one such technique, a wafer ot silicon semiconductormaterial of N- type conductivity having a resistivity or" approximatelyl5 ohm-centimeters and 9 mils thick (a mil is one-thousandth of an inch)is placed in an evacuated sealed quartz tube with an alloy sourceconsisting ot silicon and gallium and back-lilled with an inert gas. Thetemperature of the wafer is raised to about lG C. and the temperature ofthe alloy source is raised to 1950o C. Gallium from the source diffusesinto the water to form regions corresponding to P-type region l andP-type region 5. The concentration of gallium in the alloy source andthe time of dilusion is controlled so that the desired depths ofpenetration and resultant dimensions of the various layers are obtained.With the above gallium source at 105 0 C. and the wafer temperature atl250 C., diffusion time was approximately sixty hours. The wafer is thenmasked by suitable means such as an acid resistant wax in selected areasand thereafter etched with CPS etch (by volume 5 parts 70% nitric acid,3 parts 49% hydrot tluoric acid, and 3 parts acetic acid) to orm acircular pellet from the wafer having a diameter of one-half inch. Thepellet is next boiled in trichloro-ethylene, then boiled in concentratednitric acid (69% and thereafter in sequence rinsed in hydroiiuoric acid,deionized water and acetone. As a result of the aforementionedoperations, the pellet has an N-type layer 3.6 mils thick sandwichedbetween two P-type layers 2.70 mils thick. A disc of aluminum of .495inch in diameter and 2 mils thick and a tungsten back-up plate areplaced, in that order, on one side of the pellet in a carbon fixture andtwo discrete discs ot antimony-doped gold (99% gold-1% antimony), onehaving a diameter or 410 mils and 2 mils thick and the other having adiameter of 20 mils and 2 mils thick, are placed on the other side ofthe pellet in the iixture. The fixture with the pellet and discs lyingat are passed through a tunnel oven in a non-oxidizing atmosphere. Thetime and temperature of the oven are controlled to produce approximatelyone and one-half mils penetration of the gold antimony alloy. Thus amain emitter of N-type conductivity corresponding to region 6 and acontrol emitter of N-type conductivity corresponding to region 6a areformed in the pellet. Also, conductive contact is made to the regioncorresponding to region 4 by the aluminum disc and tungsten plate.

Thereafter the sub-assembly having the gold-antimony alloy contacts isground and lapped to remove the excess gold antimony and etched with CPGetch. Aluminum is then deposited over the entire surface and selectivelyremoved to form the electrode corresponding to the electrode l2 ofFIGURE l. The assembly with a tungsten back plate with lead attached ispassed through a tunnel oven to secure the tungsten plate and aluminumdeposit to the assembly. The entire assembly is then etched in CPS etch.A lead is then secured to region en by any suitable means such asthermo-compression bonding.

While the above example mentioned specic materials and structures, itwill be appreciated that modifications could be made as desired. Forexample, the gold-antimony disc for the control electrode could be moreheavily doped and include a greater thickness of material than thegold-antimony disc used for the main emitter, thus producing a heavierdoped gate region and one that is closer to the collector junction.Further details in the fabrication of the device will be explained inconnection with FGURES 8 and 9.

Another technique for forming the device of FIGURE l utilizing anall-diffused pellet is as follows. The starting material is essentiallythe same as in the previous process, an N-type silicon wafer having aresistivity of approximately l5 ohm-centimeters and 7 mils thick.Gallium is diiused into the Wafer the same as in the previous exampleexcept the time of diiusion is approximately 17 hours, thereby producinga P-type region of about 2 mils thick. The wafer is then oxidized bysubjecting it to wet oxygen at approximately 1240 C. for about fivehours. The entire Water is masked in some suitable way such as bycoating with KPR (Kodak Photo Resist, a product of the Eastman KodakCompany, and well known in the art). The wafer is then covered with aglass mask having a desired pattern of light transmission thereon. Lightis directed on the mask and exposes the photoresist according to thedesired pattern. The unexposed area is thereafter etched with ammoniumbi-fluoride to remove silicon oxide. The photoresist is then removed,leaving a PNP structure in which certain select areas have an oxidecoating thereon. Phosphorus is next diffused into the structure where itis now masked by oxide in open tube diffusion in which the wafer ismaintained at 12.50 C. and the phosphorus source of P205 at 200 C. forten minutes to form a deposit of phosphorus thereon. Heat is removedfrom the source and the wafer is maintained at 1250 C. for six hours.The wafer is then etched in hydroiluoric acid for two minutes to removeany oxide remaining on the wafer and then is cleaned by the ionizedwater rinse and acetone drying steps mentioned above. Aluminum is thenvapor-deposited on both sides of the wafer. Select areas of the Waferare next covered with an acid resistant mask such apiezon wax and thenetched in CP6 etch to pelletize the wafer as well as to remove aluminumshorts from undesired regions of the individual pellet. Tungsten back-upplates are placed on both sides of the pellet in contact with thealuminum deposits and the sub-assembly is passed through a tunnel ovenmaintained at approximately 700 C. for several minutes to secure theelectrodes thereto. In other respects the connection of electrodes tothe devices is the same as in the previous example and will be morefully discussed in connection with FIGURES 8 and 9.

ln FIGURE 4 is shown a four-layer three-electrode switching devicesimilar to the device of FIGURE 6 and corresponding elements are denotedby the same designations. However, in this device a control electrodeand the control region are placed adjacent to the region where electrodel2 makes contact with region S. This device may be fabricated inaccordance with the techniques of fabrication described above inconnection with the device of FIGURE l. The operation is essentially thesame as the operation of the device of FIGURE l. The voltage enanas@versus current characteristics of the device of FIGURE 4 ycurrent IG.

VVIn FIGURE 6 is shown another four-layer three-electrode switchingdevice in accordance withvthe Present invention. Corresponding elementsare denoted by the same designations. In this embodiment electrode 12does not make ohmic Vnon-rectifying contact with region 5. The necessaryelectrical contact to the region V for proper functioning of the gateelectrode 19 is accomplished in .one or more of several ways. Theeiciency as an emitter of parts of region 6 near the surfaces adjacentthe junction IE1 may be degraded by virtue of heavy concentration ofimpurities in the surface regions adjacent junction JEl, therebyproviding leakage current to the P-type region 5.

VThe necessary conductive path to region 5 may also be supplied byinverse saturation current and Zener current eifects. The voltage versuscurrent characteristics of the device of FIGURE 6 are shown in FIGURE 7for various values of control current IG.

The device of FIGURE 6 may be fabricated by tech- `ductivitytype of anadjacent layer. Thus there are formed in the device four F-N junctions,IEl, JE2, I C1, JGZ. IEl is formed between N and P layers 4i? and 42,respectively. I@ is formed between P Iand N layers 42 and 44,respectively. )'02 is formed between P and N layers 43Sy and 44,respectively. The end layers 4i? and 41 are of the same conductivitytype, N-type, and foreshortened in width with the adjacent intermediatelayers 42 and 43, present- 'ing extended surfaces lying in the sameplane as the eX- ternal surface of layers 4t? and 4I. Electrodes 45 and45 make conductive contact with the external surfaces of thesemiconductor body from which the device Vis'formed,

Leads 47 and 45 are connected to Velectrodes 45 and d6. In Y Y theregionsAZ and 43 N-type conductivity regions 5t) and niques similar tothe fabrication of the device of FIGURE 1, appropriate allowance, ofcourse, being made for the different resistivities desired in thevarious regions thereof to obtain the mode of operation desired.

FIGURES 8 and 9 show further eonstructional features of the device ofFIGURE 10. Body 2 is shown mounted l0n a conductive plate 35 which maybe tungsten as described above or other suitable material which in 4turnis soldered to mounting conductor 35. As mentioned above, the body 2 maybe conductively secured to the tungsten plate by a deposit of aluminum36 appropriately applied to the body 2 and soldered to the plate 35.Similarly, conductor 3S may be tungsten or other suitable material towhich external conductor Si? is soldered and the manner of contact maybe through a deposit lof aluminum 37, as pointed outrabove,appropriately applied to the body and conductively secured to thetungsten plate. Control conductor 19 may be a wire either soldered to agold-antimony (Au-Sb) deposit on the N-region or secured thereto bythermo-compression bonding. The constructional features shown in FIGURES8 and 9 may be utilized in the other embodiments described above and tobe described in the remainder of this specification.

In FIGURE l0 is shown a four-layer multi-electrode 'switch-type device.The device is similar to the device of FIGURE 1 and correspondingelements are denoted by the same designa-tions. In this device,intermediate layer 5 extends out to the top surface of the device onboth sides of N-type region 6. Similarly, intermediate layer 3 extendsout on the bottom of the surface of the device on both sides of theP-type region 4. Shorting contacts 12y and 33 are applied as in FIGUREl. In addition, control Fregion 6a of N-type conductivity in rectifyingcontact with region 5 is formed therein on that side remote from theshort. VThe device of FIGURE 7 may be fabricated in a manner similar tothe manner of fabrication of the device of FIGURE 1. Y

In FIGURE 1l are shown the voltage versus current characteristics of thedevice of FIGURE 7. When electrode 12 is positive with respect toelectrode 13, the junction IC becomes forward biased as shown in thethird quadrant of the graph of FIGURE l1. When electrode 12 isnegatively biased with respect to electrode 13, the forwardcharacteristics are as shown in the family of graphs in the rstquadrant. YThese graphs show the current versus voltage characteristicsfor various values of IG1, IG5 applied at electrode 19.

In FIGURE 12 is shown a tive-layer multi-electrode type switch devicehaving control electrodes connected to various intermediate layers ofthe device. This iigure shows a cross-sectional View of a switchingdevice having the voltage versus current characteristics depicted inFIGURE A13. This device has ve layers, 40, 41, 42, 43, and 44, eachlayer being of a conductivity type opposite to the con- 51,respectively,- are formed to which electrodes 52 and 53, respectively,are connected. It will be appreciated that the structure shown inFIGURE12 can be fabricated by techniques similar to the techniques forfabrication of the device of FIGURE 1.

In FIGURE 13 is shown an idealized graph of the current versus voltagecharacteristics of the device of FIGURE l2. The device of FIGURE 12 ischaracterized as a tive-region symmetrical switch having two shortedemitters which switches either polarity of Vvoltage applied across itsterminals. The operation of the device of FIG- URE 12 willV be explainedin conjunction with the graph of FIGURE 13. Assume that the voltageapplied to electrode 45 is nega-tive with respect to the voltageappliedl to 4e. Junction .im acts as an operative shorted emitter.Iunction I c1 acts as a collector, that is, the collector which is toswitch. Junction 102 acts as the other emitter and junction Im wouldtend to be in the reverse bias but because of the short circuit due toelectrode 46, cannot sustain'any voltage. The device in the assumedpolarity yswitches just as does the device of FIGURE 1 and has thecharacteristic shown in the rst quadrant of the graph. If now theapplied voltage is reversed in polarity, it is obvious from the symmetryof this structure tha-t again switching occurs and has thecharacteristic shown in the third quadrant of the figure. In aconventional NPNPN or PNPNP two-electrode device, switching also occursbut one or the other emitter junction is reversely biased so as to passcurrent only at the avalanche Vol-tage of the junction. When electrode45 is polarized negatively with respect to electrode 46, the device willbecome conductive at a particular value of voltage VBOR and, similarly,when electrode 45 is positively polarized with respect to electrode 45,the device will become conductive at another particular value of voltageVBOL as shown in FIG- URE 21. The family of graphs IG1-IG5 and IFI-IFF,show the variation of the current versus voltage characteristic acrosselectrodes 45, 46 of the device for various values of control currentapplied at control zones 50 and 51, respectively. For increasing Valuesof control current, the devices switches to the forward conductioncondition at lower values of voltage applied between electrodes 45 and46.

As mentioned previously, the criter-ia for breakdown in forwardconduction of lthe junction Im in one case, and IGZ in the other case,is that the current gain of at least one of the two transistor sectionsinto which the device is resolvable in the forward conduction conditionhave an alpha which increases with current and also that the sum of thealphas of the two-transistor sections at some intermediate current beequal to or greater than unity. These conditions for firing for aparticular voltage applied across the main current carrying electrodes45 and 46 can be fulfilled by the application of suitable currentstoN-type conductivity zones 50 and 51. Of course, a signal on one of thecontrol electrodes 60 and 61 would have an effect only when the mainelectrodes 45 and 46 are appropriately polarized. Of coursethe switchingof the device to the conductive state can alsoV be accomplished bysimultaneous application of control currents to two ofthe controlelectrodes 5t) and 51.

The device of FIGURE l2 may be used in circuits where conventionalfour-layer threoelectrode control devices, commonly referred to ascontrolled rectiers, are used as well as in other circuits which makefull utilization of the bi-directional switching characteristics of thedevice as well as the multiplicity of control elements.

Typical devices of the above-described types have been made passingcurrents of greater than fty amperes in forward direction with forwardvoltage drop being less than two volts and breakdown voltage betweenmain current carrying electrodes being greater than 400 volts. Suchdevices were stable with temperatures upwards of 165 C. A typical valuefor control or gating current for such devices was 200 micro-amperes.

The devices disclosed above may be used in circuits in which theconventional controlled rectiers are used, of course, appropriateallowance being made for difference in the modes of operation. While thevarious devices have in large part been shown as fabricated by diffusiontechniques, it will be understood that other techniques and combinationof techniques may be used to form the structures described. v While theinvention has been shown and described in connection with particularembodiments of the invention, it will be apparent to those skilled inthe art that changes and modifications may be made without departingfrom the invention in its broader aspects. For example, while thedevices have been generally illustrated in rectilinear geometries, itwill be understood that circular, cylindiical and other geometries maybe used. Also, while the con-trol regions of the device have beendisclosed as N-type conductivity, P-type conductivity control regionscould be used with devices on which the conductivity type of the variousregions is reversed to that described. It is, therefore, intended thatthe appended claims cover all such changes and modifications as fallwithin the true spirit and scope of the invention.

I claim:

11. A semiconductor device comprising a body of semiconductor materialincluding four layers of one and the opposite conductivity type, layersof one conductivity type being interleaved with layers of the oppositeconductivity type forming a plurality of P-N junctions therein, anelectrode in low resistance ohmic vcontact with an external layer or"said body, means for providing a 10W impedance conductive path from saidone electrode to an adjacent intermediate layer of opposite conductivitytype, .another electrode in low resistance ohmic contact with a surfaceof the other external layer of said body, a zone of said oneconductivity type in said adjacent intermediate layer of oppositeconductivity type, and a third electrode connected to said zone ofopposite conductivity type.

2. A semiconductor device comprising a body of semiconductor materialincluding four layers of one and the opposite conductivity type, layersof one conductivity .type being interleaved with layers of the oppositeconductivity type forming therewith a plurality of large area P-Njunctions therein, a large area electrode in low resistance ohmiccontact with an external layer of said body, means providing a lowimpedance conductive path from said one electrode to an adjacentintermediate layer of opposite conductivity type, another electrode inlow resistance large area ohmic contact wit-h a surface of the otherexternal layer of said body, a zone of said one conductivity type insaid adjacent intermediate layer of opposite conductivity type forming aP-N junction of small extent therewith, and a third electrode connectedto said zone of opposite conductivity type.

A semiconductor device comprising a body of semiconductor materialincluding four layers of one and the opposite conductivity type, layersof one conductivity type being interleaved with layers of the oppositeconductivity type forming a plurality of P-'N junctions therein, anelectrode in low resistance ohmic contact with a surface of an externallayer of said body and an exposed surface of an adjacent intermediatelayer, another electrode in low resistance ohmic contact with a lsurfaceof the other external layer of said body, a zone of said oneconductivity type in said adjacent intermediate layer, and a thirdelectrode connected to said zone of opposite conductivity type.

d. A `semiconductor device comprising a body of semi conductor materialinclu-ding four layers of one and the opposite conductivity type, layersof one conductivity type being interleaved with -layers of the oppositeconductivity type forming a plurality of large area P-'N junctionstherein, an electrode in low resistance ohmic contact of lar-ge extentwith a surface of an external layer of said body and an exposed surfaceof an adjacent intermediate layer, and 4another electrode in lowresistance ohmic contact of large extent with a surface of the otherexternal layer of said body, a zone of said one conducrtivity type insa-id adjacent inter-mediate layer lof opposite conductivity typeforming a P-N junction of small extent therewith, a third electrodeconnected to said zone of opposite conductivity type.

'5. A semiconductor device comprisinga-body of semiconductor materialincluding four layers of one and the opposite conductivity type, layersof one conductivity type being interleaved with layers of the oppositeconductivity type forming a plurality of PMN junctions therein, .anelectrode in low resistance ohmic contact with a surface of an externallayer of said body and an exposed surface of an adjacent intermediatelayer, and another electrode in low resistance ohmic contact with asurface of the other external layer of said body and an exposed surfaceof an adjacent intermediate layer, and a third electrode connected t-oone of said intermediate layers making an injecting contact therewith.

6. A :semiconductor device comprising a body of semiconductor materialincluding tive layers of one and the opposite conductivity type, layersof on-e conductivity type being interleaved with layers of the oppositeconductivity type forming a plurality of P-N junctions therein, anelectrode in low resistance ohmic Contact with a surface of an externallayer of said body and an exposed surface of an adjacent intermediatelayer, and another electrode in low resistance ohmic contact with .asurface of the other external layer of said body .and an exposed surfaceof an adjacent inter-mediate layer, and a third electrode connected toone of said intermediate layers adjacent .an external layer making arectifying conta-ct therewith.

7. A semiconductor device comprising a body of semiconductor materialincluding a region of one conductivity type having therein a zone of theopposite conductivity type to form therewith a rst P-N junction, anelectrode in low resistance ohmic contact with said zone, means forproviding a low impedance conductive path from said one electrode tosaid region, a third region of said opposite conductivity type formingwith said one P-N junction a second P-N junction, said third regionfor-ming a junction transistor with said second P-N junction acting asthe collector P-,N junction thereof, a fourth region forming lwith saidthird region an injecting junction, sai-d fourth, third and said oneregion forming a transistor with said second junction acting as thecollector P-N junction thereof, another electr-ode secured to said bodyin conductive relation with said fourth region of one conductivity type,another zone in said body of opposite conductivity type, a thirdelectrode connected to said other zone of opposite conductivity type,said other zone with said second and third regions forming a transisterwith the second P-N junction being the collector PaN junction thereof.

S. A semiconductor device comprising a body of semiconductor materialincluding a first region of one conductivity type having therein a zoneof the opposite conductivity type to form therewith a lirst large areaP-N junction, anY electrode in low resistance ohrnic contact with saidzone, means for providing a low impedance conductive path from said oneelectrode to said region, the third region of said opposite conductivitytype forming with said one region a second P-N junction, said thirdregion, said second region and said first region forming a junctiontransistor with said second `P-N junction acting as the collector P-Njunction thereof, a fourth region of said one conductivity typek formingwith said third region a third P-N junction, said fourth, third and saidone junction forming a transistor with said second P-N junction actingas the collector P-N junction thereof, another electrode secured to saidbody in conductive relation with said fourth region of one conductivitytype, another zone of opposite conductivity type i in said rst region ofone conductivity type to form therewith a small area P-N junction, athird electrode connected to said other zone of opposite conductivitytype, said zone, said rst region and said third region forming atransistor in which said second collector P-N junction acts as thecollector P-N junction thereof.

9. A semiconductor device comprising a body of semiconductor materialincluding four layers of one and the opposite conductivity type, layersof one conductivity type being interleaved with layers of the oppositeconductivity type forming a plurality of P-N junctions therein, anelectrode in low resistance ohmic Contact with an external layer of saidbody, said external layer and an adjacent intermediate layer beingconstituted to form a P-N junction becoming conductive in the inversedirec- Ition atlow voltages, another electrode in low resistance ohmiccontact with a surface of the other external layer of said body, a zoneof said one conductivity type in said adjacent intermediate layer ofopposite conductivity type, and a third electrode connected to said zoneof opposite conductivity type.

10. A semiconductor device comprising a body of semi- Y conductormaterial including four layers of one and the opposite conductivity typebetween two faces of said body, layers of one conductivity type beinginterleaved with layers of the opposite conductivity type forming aplurality of P-N junctions therein, an adjacent intermediate layersurrounding an end layer to define therewith a common surface inl one ofsaid faces, an electrode in contact with said one adjacent layer andsaid one end layer in said surface, another end layer having a surfaceforming the other face of said body, another electrode in ohmic contactwith said other face of said body, a zone of said one 'conductivity typein said adjacent intermediate layer, and a third contact torsaid zone.

11. A semiconductor device comprising a body of semiconductor materialincluding four :layers of one and the opposite conductivity type betweentwo faces of said body, layers of one conductivity type beinginterleaved with layers of the opposite conductivity type forming aplurality of P-N junctions therein, an end layer of said oneconductivity type and an intermediate layer of said oppositeconductivity type beingdisposed to dene a common surface in one of saidfarces', an electrode in ohinic contact-with said one end layer and saidone adjacent intermediate layer in said surface, another end layer ofsaid body having a surface dening the other face thereof, .anotherelectrode in low resistance ohmic contact with said other face of saidbody, a minority carrier injecting contact to said adjacent intermediatelayer of said opposite type conductively remote from said one electrode.v Y

References Cited by the Examiner UNITED STATES PATENTS 2,875,505 3/59Pfann 317-235 2,939,056 5/60 Muller 317-235 2,980,810 4/61 Goldey317-235 .2,985,804 5/61 VBuie 317-235 .2,993,154 7/61 Goldey 317-235OTHER REFERENCES Bulletin D420-02-8-59, page 14, Solid State Products,Inc., Salem, Mass. DAVID I. GALVIN, Primary Examiner.

LLOYD MCCOLLUM, GEORGE N. WESTBY, Examiners.

7. A SEMICONDUCTOR DEVICE COMPRISING A BODY OF SEMICONDUCTOR MATERIALINCLUDING A REGION OF ONE CONDUCTIVITY TYPE HAVING THEREIN A ZONE OF THEOPPOSITE CONDUCTIVITY TYPE OF FORM THEREWITH A FIRST P-N JUNCTION, ANELECTRODE IN LOW RESISTANCE OHMIC CONTACT WITH SAID ZONE, MEANS FORPROVIDING A LOW IMPEDANCE CONDUCTIVE PATH FROM SAID ONE ELECTRODE TOSAID REGION, A THIRD REION OF SAID OPPOSITE CONDUCTIVITY TYPE FORMINGWITH SAID ONE P-N JUNCTION A SECOND P-N JUNCTION, SAID THIRD REGIONFORMING A JUNCTION TRANSISTOR WITH SAID SECOND P-N JUNCTION ACTING ASTHE COLLECTOR P-N JUNCTION THEREOF, A FOURTH REGION FORMING WITH SAIDTHIRD REGION AN INJECTING JUNCTION, SAID FOURTH, THIRD AND SAID ONEREGION FORMING A TRANSISTOR WITH SAID SECOND JUNCTION ACTING AS THECOLLECTOR P-N JUNCTION THEREOF, ANOTHER ELECTRODE SECURED TO SAID BODYIN CONDUCTIVE RELATION WITH SAID FOURTH REGION OF ONE CONDUCTIVITY TYPE,ANOTHER ZONE IN SAID BODY OF OPPOSITE CONDUCTIVITY TYPE, A THIRDELECTRIDE CONNECTED TO SAID OTHER ZONE OF OPPOSITE CONDUCTIVITY TYPE,SAID OTHER ZONE WITH SAID SECOND AND THIRD REGIONS FORMING A TRANSISTORWITH THE SECOND P-N JUNCTION BEING THE COLLECTOR P-N JUNCTION THEREOF.